Ferroelectric transistors that store and compute on a large scale


July 13, 2023

(Nanowerk News) The Big Data revolution has overtaxed the capabilities of advanced electronic hardware, challenging engineers to rethink nearly every aspect of the microchip. With ever-larger data sets to store, search, and analyze at ever-increasing levels of complexity, these devices must become smaller, faster, and more energy efficient to keep up with the pace of data innovation.

The ferroelectric field effect transistor (FE-FET) is one of the most interesting answers to this challenge. Like traditional silicon-based transistors, the FE-FET is a switch, turning on and off at incredible speeds to communicate the 1s and 0s the computer uses to perform its operations.

But FE-FETs have an additional function that conventional transistors don’t: their ferroelectric properties allow them to hold an electric charge.

This property allows them to function as non-volatile memory devices as well as computing devices. Capable of storing and processing data, FE-FET is the subject of numerous research and development projects. A successful FE-FET design will dramatically reduce the size and energy consumption thresholds of traditional devices, and increase speed.

Researchers at the University of Pennsylvania School of Engineering and Applied Science have introduced a new FE-FET design that demonstrates record-breaking performance in computing and memory. text Researchers at the University of Pennsylvania School of Engineering and Applied Science have introduced a new FE-FET design that demonstrates record-breaking performance in computing and memory. (Image: Penn Engineering)

A recent study published in Natural Nanotechnology (“AlScN compatible with scalable CMOS back-end-of-line/two-dimensional channel ferroelectric field-effect transistor”) is led by Deep Jariwala, Associate Professor in the Department of Electrical and Systems Engineering (ESE), and Kwan-Ho Kim, Ph.D. candidate in his lab, debuted a design. They collaborated with fellow Penn Engineering faculty member Troy Olsson, also Associate Professor at ESE, and Eric Stach, the Robert D. Bent Professor of Engineering in the Department of Materials Science and Engineering (MSE) and Director of the Laboratory for Research on the Structures of Materials (LRSM).

The transistor coats a two-dimensional semiconductor called molybdenum disulfide (MoS2) on top of a ferroelectric material called aluminum scandium nitride (AlScN), demonstrating for the first time that the two materials can be combined effectively to make transistors at scales that are attractive to industrial manufacturing.

“Because we have made this device combining a ferroelectric insulating material with a 2D semiconductor, both of which are very energy efficient,” said Jariwala. “You can use it for computing as well as memory — in turn and with high efficiency.”

The Penn Engineering team’s devices are renowned for their unprecedented thinness, enabling each device to operate with a minimum surface area. Additionally, small devices can be manufactured in large arrays that can be scaled to industrial platforms.

“With our semiconductor, MoS2, at only 0.7 nanometers, we are not sure it can survive the amount of charge that our ferroelectric material, AlScN, will inject into it,” said Kim. “To our surprise, not only did both survive, but the amount of current that allowed the semiconductor to be carried was record-breaking.”

The more devices that can be carried, the faster they can operate for computing applications. The lower the resistance, the faster the memory access speed.

this MOS2 and the combination of AlScN is a real breakthrough in transistor technology. Other FE-FET research teams have been consistently hindered by the loss of ferroelectric properties as the device is miniaturized to approach industry-appropriate scales.

Until this research, the miniaturization of FE-FETs has resulted in a severe shrinkage of the “memory window”. This meant that as engineers reduced the transistor design size, devices developed unreliable memories, mistaking 1s for 0s and vice versa, compromising their overall performance.

Jariwala Labs and collaborators achieved a design that keeps the memory window large with very small device dimensions. With AlScN at 20 nanometers, and MoS2 at 0.7 nanometers, the FE-FET reliably stores data for fast access.

“The key,” says Olsson, “is our ferroelectric material, AlScN. Unlike many ferroelectric materials, it retains its unique properties even though it is very thin. In a recent paper from my group, we show that we can maintain its unique ferroelectric properties at a smaller thickness: 5 nanometers.”

The Penn Engineering team’s next steps are focused on further miniaturization of these to produce devices that operate at low enough voltages to be compatible with leading consumer device manufacturers.

“Our FE-FET is very promising,” said Jariwala. “With further development, these versatile devices could have a place in almost any technology you can think of, especially those that support AI and consume, generate or process large amounts of data — from sensing to communications and more.”


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