In a Scalability First Approach, EeroQ Achieves Tape-Out of its ‘Wonder Lake’ Chip

Insider Summary

• EeroQ achieved a new chip tape-out in a US semiconductor foundry, meaning it is ready for fabrication and production.
• The company uses a helium approach for its quantum processor design.
• Ultimately, the company says it’s a giant leap toward designing powerful, small, and scalable quantum computers.

In a notable advance, EeroQ announced it has achieved tape-out of the company’s “Wonder Lake” chip, according to blog post on the company website. The milestone was set at the US semiconductor foundry, and it brings EeroQ one step closer to realizing their vision of a scalable quantum processor, the company notes.

“Tape out” refers to the stage in semiconductor manufacturing where the finished chip design is sent to a foundry for mass production and fabrication.

“This scaling architecture has passed the stringent design checks required for compatibility with today’s standard chip manufacturing processes (CMOS),” Nick Farina, CEO of EeroQ, explained on the blog.

This achievement is expected to pave the way for future quantum devices that can harness the power of single electrons as qubits, positioning EeroQ as a leading player in the quantum computing industry.

The Wonder Lake chip offers 2,432 qubits of the future, an important building block for quantum processors. What sets this system apart is its efficiency, requiring only about 30 control lines, which signifies a significant reduction in complexity compared to previous quantum architectures.

The essence of the Wonder Lake chip lies in the concept of isolated electron spins suspended above the surface of liquid helium (eHe). This approach was originally proposed in a 1999 paper in Science, which outlines the potential of exploiting the vertical motion of electrons over a helium surface, known as the “Rydberg state” of electron motion, for quantum computations. Building on these ideas, EeroQ’s Chief Technology Officer, Stephen Lyon, proposed in 2006 that electron spin states offer even greater advantages, such as much better quantum coherence beyond 10 seconds.

The unique combination of small electron size, superfluid pure helium environment, CMOS infrastructure, and lack of modular interconnects set EeroQ quantum devices apart from other companies, offering perhaps a competitive advantage in the quantum computing landscape.

EeroQ’s strategy involved building the majority of their future processors on a single chip, manufactured in a commercial CMOS foundry. Upon receiving the wafer from the foundry, a thin layer of liquid helium is added, and the electrons are deposited into the on-chip reservoir. Their spin state is then initialized, and computation can begin.

Each electron qubit hovers roughly 10 nanometers above the surface of the helium, trapped by control voltages from electrodes located beneath the helium. This precise positioning enables controlled interactions and gate operations, essential for quantum computing.

The next important step for EeroQ is the demonstration of a two qubit gate. It will be based on the well-understood physics of magnetic dipole-dipole interactions, which can be integrated into foundry chips. By taking advantage of the tiny spin magnetism of electrons, EeroQ plans to implement highly accurate two qubit gates. The magnetic field of each electron is a well-known quantity in physics, with measurement precision spanning at least 12 decimal places.

To achieve the precision required for quantum gates, EeroQ will rely on engineered microstructures on the electron-holding CMOS chips. The inherent accuracy of the CMOS process is projected to reduce fabrication-related quantum gate errors to only 0.01%.

EeroQ’s long term goal is to scale their quantum computing system from a single qubit to an impressive 10,000 qubits and beyond.

However, according to the blog post, the company is continuously working towards achieving their immediate goals:

● qubit coherence of 10+ seconds
● High qubit connectivity
● Identical qubits, controllable in parallel with only a few voltages on the CMOS chip
● Mobile qubits on a helium surface (providing up to 50x the reduced overhead required for error correction)
● 99.9% gate fidelity.
● Modular interconnected systems … so all the quantum computing power you need will be in your thumbnail-sized device!

Their approach of building a quantum computer backwards, starting at scale, holds great promise for addressing the challenges of quantum scalability.

“There are two very challenging parts to building a useful quantum computer: a high-quality quantum gate, and the pathway to scaling,” writes Farina. “With our latest work, we are proud to join the ranks of the leadership in scalability. Together with recent advances in error mitigation and more efficient algorithms, we can see the commercial quantum future arriving sooner than expected – led by the ability to leverage our architectural advantages to scale quickly.”

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